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Microchip Technology /ATSAMV71N21B /MLB /MLBC1

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Interpret as MLBC1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (LOCK)LOCK 0 (CLKM)CLKM 0NDA

Description

MediaLB Control 1 Register

Fields

LOCK

MediaLB Lock Error Status (cleared by writing a 0)
CLKM

MediaLB Clock Missing Status (cleared by writing a 0)
NDA

Node Device Address

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data